Tuesday July 21, 2009, PT
Incentia Announces New Release of TimeCraft Timing Analysis Software
More Speedup and Less Memory to Run More Corners in Less Time for Large Designs
SANTA CLARA, CA - July 21, 2009 - Incentia Design Systems, Inc., a technology leader in nanometer timing analysis and design closure solutions, announced today a major release to its TimeCraft™ timing analysis software. The TimeCraft product line contains complete timing analysis solutions, including STA, signal integrity analysis, statistical STA (SSTA), power analysis, and constraint debugging. The new release further improves runtime and memory usage when compared to its 2008.10 release. In addition, it adds advanced signal integrity analysis and other features for nanometer design timing sign-off. TimeCraft has been widely used and taped out many complex nanometer designs, including 40nm designs, and designs over 50M gates.
Incentia has consistently improved the runtime and memory usage of its software for continuous growth of design size and complexity. Compared to its previous 2008.10 formal release, the latest software delivers over 2X speedup and 20% memory reduction for certain large customer design cases. Incentia has also improved its multi-thread capability to correlate well with available cores on a machine. Using an 8-core machine, a 2X to 5X further speedup can be achieved. Together with the multi-mode multi-corner (MMMC) support, multiple jobs can be submitted to network machines and run in parallel under multi-thread to maximize the machine performance. These improvements are available for all TimeCraft product options and dramatically shorten total verification turnaround time and improve design productivity.
Results from crosstalk analysis tend to be too pessimistic due to worse-case scenario and/or unrealistic overlaps of timing windows in the static analysis. TimeCraft signal integrity analysis has been enhanced to provide more pessimism reduction capabilities. It considers multiple timing arcs in one cell, probability of signals switching at the same time, logic correlation, clock re-converge pessimism removal, and discrete timing windows to reduce pessimism and generate more accurate results. Other added features in TimeCraft include CPF/UPF power format for advanced low power designs, binary SPEF input/output, combined location-based OCV (LOCV) and SSTA flow, and enhanced ECSM/S-ECSM/CCS/CCS-VA library support.
"Using the latest patch release, one of our customers has observed a 2.5X performance speedup and 25% memory reduction for their largest design." said Arthur Wei, vice president of operation at Incentia. "TimeCraft maintains its leadership position as the fastest STA on the market with this latest patch release".
TimeCraft timing analysis software is available for evaluation now on Linux (32-bit and 64-bit) and Sun Solaris (32-bit and 64-bit) platforms.
Incentia Design Systems, Inc. is a leading Electronic Design Automation (EDA) tool provider of advanced Timing Analysis, Design Closure, and Logic Synthesis software for multi-million-gate nanometer designs. Incentia patented technologies provide the fastest Static Timing Analysis (STA) tool in the market today. Incentia's products are in use at leading semiconductor, fabless IC design, systems, and design service companies worldwide and have produced numerous successful tape-outs in different design application areas, such as communications, networking, wireless, chip-sets, consumer electronics, and multi-media. Incentia has offices in Santa Clara, California and Hsinchu Science Park, Taiwan, and distributors in Japan, China, India, Korea, and Israel. For more information, please visit www.incentia.com, email to email@example.com or call 408-727-8988.
Arthur Wei, Incentia Design Systems, Inc., 408-727-8988 X120, firstname.lastname@example.org
TimeCraft is a trademark of Incentia Design Systems, Inc. All other trademarks and tradenames are the property of their respective holders.